\doxysection{stm32h7xx\+\_\+ll\+\_\+crs.\+h}
\hypertarget{stm32h7xx__ll__crs_8h_source}{}\label{stm32h7xx__ll__crs_8h_source}\index{C:/Users/ASUS/Desktop/dm-\/ctrlH7-\/balance-\/9025test/Drivers/STM32H7xx\_HAL\_Driver/Inc/stm32h7xx\_ll\_crs.h@{C:/Users/ASUS/Desktop/dm-\/ctrlH7-\/balance-\/9025test/Drivers/STM32H7xx\_HAL\_Driver/Inc/stm32h7xx\_ll\_crs.h}}
\mbox{\hyperlink{stm32h7xx__ll__crs_8h}{Go to the documentation of this file.}}
\begin{DoxyCode}{0}
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\DoxyCodeLine{00019\ \textcolor{comment}{/*\ Define\ to\ prevent\ recursive\ inclusion\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{00020\ \textcolor{preprocessor}{\#ifndef\ STM32H7xx\_LL\_CRS\_H}}
\DoxyCodeLine{00021\ \textcolor{preprocessor}{\#define\ STM32H7xx\_LL\_CRS\_H}}
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\DoxyCodeLine{00025\ \textcolor{preprocessor}{\#endif}}
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\DoxyCodeLine{00034\ \textcolor{preprocessor}{\#if\ defined(CRS)}}
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\DoxyCodeLine{00040\ \textcolor{comment}{/*\ Private\ types\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
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\DoxyCodeLine{00050\ }
\DoxyCodeLine{00055\ \textcolor{preprocessor}{\#define\ LL\_CRS\_ISR\_SYNCOKF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ CRS\_ISR\_SYNCOKF}}
\DoxyCodeLine{00056\ \textcolor{preprocessor}{\#define\ LL\_CRS\_ISR\_SYNCWARNF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ CRS\_ISR\_SYNCWARNF}}
\DoxyCodeLine{00057\ \textcolor{preprocessor}{\#define\ LL\_CRS\_ISR\_ERRF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ CRS\_ISR\_ERRF}}
\DoxyCodeLine{00058\ \textcolor{preprocessor}{\#define\ LL\_CRS\_ISR\_ESYNCF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ CRS\_ISR\_ESYNCF}}
\DoxyCodeLine{00059\ \textcolor{preprocessor}{\#define\ LL\_CRS\_ISR\_SYNCERR\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ CRS\_ISR\_SYNCERR}}
\DoxyCodeLine{00060\ \textcolor{preprocessor}{\#define\ LL\_CRS\_ISR\_SYNCMISS\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ CRS\_ISR\_SYNCMISS}}
\DoxyCodeLine{00061\ \textcolor{preprocessor}{\#define\ LL\_CRS\_ISR\_TRIMOVF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ CRS\_ISR\_TRIMOVF}\textcolor{preprocessor}{}}
\DoxyCodeLine{00065\ }
\DoxyCodeLine{00070\ \textcolor{preprocessor}{\#define\ LL\_CRS\_CR\_SYNCOKIE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ CRS\_CR\_SYNCOKIE}}
\DoxyCodeLine{00071\ \textcolor{preprocessor}{\#define\ LL\_CRS\_CR\_SYNCWARNIE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ CRS\_CR\_SYNCWARNIE}}
\DoxyCodeLine{00072\ \textcolor{preprocessor}{\#define\ LL\_CRS\_CR\_ERRIE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ CRS\_CR\_ERRIE}}
\DoxyCodeLine{00073\ \textcolor{preprocessor}{\#define\ LL\_CRS\_CR\_ESYNCIE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ CRS\_CR\_ESYNCIE}\textcolor{preprocessor}{}}
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\DoxyCodeLine{00081\ \textcolor{preprocessor}{\#define\ LL\_CRS\_SYNC\_DIV\_1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00082\ \textcolor{preprocessor}{\#define\ LL\_CRS\_SYNC\_DIV\_2\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ CRS\_CFGR\_SYNCDIV\_0\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00083\ \textcolor{preprocessor}{\#define\ LL\_CRS\_SYNC\_DIV\_4\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ CRS\_CFGR\_SYNCDIV\_1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00084\ \textcolor{preprocessor}{\#define\ LL\_CRS\_SYNC\_DIV\_8\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (CRS\_CFGR\_SYNCDIV\_1\ |\ CRS\_CFGR\_SYNCDIV\_0)\ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00085\ \textcolor{preprocessor}{\#define\ LL\_CRS\_SYNC\_DIV\_16\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ CRS\_CFGR\_SYNCDIV\_2\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00086\ \textcolor{preprocessor}{\#define\ LL\_CRS\_SYNC\_DIV\_32\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (CRS\_CFGR\_SYNCDIV\_2\ |\ CRS\_CFGR\_SYNCDIV\_0)\ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00087\ \textcolor{preprocessor}{\#define\ LL\_CRS\_SYNC\_DIV\_64\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (CRS\_CFGR\_SYNCDIV\_2\ |\ CRS\_CFGR\_SYNCDIV\_1)\ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00088\ \textcolor{preprocessor}{\#define\ LL\_CRS\_SYNC\_DIV\_128\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ CRS\_CFGR\_SYNCDIV\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00092\ }
\DoxyCodeLine{00096\ \textcolor{preprocessor}{\#define\ LL\_CRS\_SYNC\_SOURCE\_GPIO\ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00097\ \textcolor{preprocessor}{\#define\ LL\_CRS\_SYNC\_SOURCE\_LSE\ \ \ \ \ \ \ \ \ \ \ \ \ CRS\_CFGR\_SYNCSRC\_0\ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00098\ \textcolor{preprocessor}{\#define\ LL\_CRS\_SYNC\_SOURCE\_USB\ \ \ \ \ \ \ \ \ \ \ \ \ CRS\_CFGR\_SYNCSRC\_1\ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00102\ }
\DoxyCodeLine{00106\ \textcolor{preprocessor}{\#define\ LL\_CRS\_SYNC\_POLARITY\_RISING\ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00107\ \textcolor{preprocessor}{\#define\ LL\_CRS\_SYNC\_POLARITY\_FALLING\ \ \ \ \ \ \ CRS\_CFGR\_SYNCPOL\ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00111\ }
\DoxyCodeLine{00115\ \textcolor{preprocessor}{\#define\ LL\_CRS\_FREQ\_ERROR\_DIR\_UP\ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00116\ \textcolor{preprocessor}{\#define\ LL\_CRS\_FREQ\_ERROR\_DIR\_DOWN\ \ \ \ \ \ \ \ \ CRS\_ISR\_FEDIR\ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00120\ }
\DoxyCodeLine{00129\ \textcolor{preprocessor}{\#define\ LL\_CRS\_RELOADVALUE\_DEFAULT\ \ \ \ \ \ \ \ \ 0x0000BB7FU}}
\DoxyCodeLine{00130\ }
\DoxyCodeLine{00134\ \textcolor{preprocessor}{\#define\ LL\_CRS\_ERRORLIMIT\_DEFAULT\ \ \ \ \ \ \ \ \ \ 0x00000022U}}
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\DoxyCodeLine{00142\ \textcolor{preprocessor}{\#define\ LL\_CRS\_HSI48CALIBRATION\_DEFAULT\ \ \ \ 0x00000020U}\textcolor{preprocessor}{}}
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\DoxyCodeLine{00151\ \textcolor{comment}{/*\ Exported\ macro\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{00155\ }
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\DoxyCodeLine{00167\ \textcolor{preprocessor}{\#define\ LL\_CRS\_WriteReg(\_\_INSTANCE\_\_,\ \_\_REG\_\_,\ \_\_VALUE\_\_)\ WRITE\_REG(\_\_INSTANCE\_\_-\/>\_\_REG\_\_,\ (\_\_VALUE\_\_))}}
\DoxyCodeLine{00168\ }
\DoxyCodeLine{00175\ \textcolor{preprocessor}{\#define\ LL\_CRS\_ReadReg(\_\_INSTANCE\_\_,\ \_\_REG\_\_)\ READ\_REG(\_\_INSTANCE\_\_-\/>\_\_REG\_\_)}\textcolor{preprocessor}{}}
\DoxyCodeLine{00179\ }
\DoxyCodeLine{00183\ }
\DoxyCodeLine{00195\ \textcolor{preprocessor}{\#define\ \_\_LL\_CRS\_CALC\_CALCULATE\_RELOADVALUE(\_\_FTARGET\_\_,\ \_\_FSYNC\_\_)\ (((\_\_FTARGET\_\_)\ /\ (\_\_FSYNC\_\_))\ -\/\ 1U)}}
\DoxyCodeLine{00196\ }
\DoxyCodeLine{00200\ }
\DoxyCodeLine{00204\ }
\DoxyCodeLine{00205\ \textcolor{comment}{/*\ Exported\ functions\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{00209\ }
\DoxyCodeLine{00213\ }
\DoxyCodeLine{00220\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_CRS\_EnableFreqErrorCounter(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00221\ \{}
\DoxyCodeLine{00222\ \ \ SET\_BIT(CRS-\/>CR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gace21476d647129c935f84daf84d91699}{CRS\_CR\_CEN}});}
\DoxyCodeLine{00223\ \}}
\DoxyCodeLine{00224\ }
\DoxyCodeLine{00230\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_CRS\_DisableFreqErrorCounter(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00231\ \{}
\DoxyCodeLine{00232\ \ \ CLEAR\_BIT(CRS-\/>CR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gace21476d647129c935f84daf84d91699}{CRS\_CR\_CEN}});}
\DoxyCodeLine{00233\ \}}
\DoxyCodeLine{00234\ }
\DoxyCodeLine{00240\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_CRS\_IsEnabledFreqErrorCounter(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00241\ \{}
\DoxyCodeLine{00242\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(CRS-\/>CR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gace21476d647129c935f84daf84d91699}{CRS\_CR\_CEN}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gace21476d647129c935f84daf84d91699}{CRS\_CR\_CEN}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00243\ \}}
\DoxyCodeLine{00244\ }
\DoxyCodeLine{00250\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_CRS\_EnableAutoTrimming(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00251\ \{}
\DoxyCodeLine{00252\ \ \ SET\_BIT(CRS-\/>CR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gafa48432b942f1896e05a2eff91178edd}{CRS\_CR\_AUTOTRIMEN}});}
\DoxyCodeLine{00253\ \}}
\DoxyCodeLine{00254\ }
\DoxyCodeLine{00260\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_CRS\_DisableAutoTrimming(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00261\ \{}
\DoxyCodeLine{00262\ \ \ CLEAR\_BIT(CRS-\/>CR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gafa48432b942f1896e05a2eff91178edd}{CRS\_CR\_AUTOTRIMEN}});}
\DoxyCodeLine{00263\ \}}
\DoxyCodeLine{00264\ }
\DoxyCodeLine{00270\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_CRS\_IsEnabledAutoTrimming(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00271\ \{}
\DoxyCodeLine{00272\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(CRS-\/>CR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gafa48432b942f1896e05a2eff91178edd}{CRS\_CR\_AUTOTRIMEN}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gafa48432b942f1896e05a2eff91178edd}{CRS\_CR\_AUTOTRIMEN}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00273\ \}}
\DoxyCodeLine{00274\ }
\DoxyCodeLine{00283\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_CRS\_SetHSI48SmoothTrimming(uint32\_t\ Value)}
\DoxyCodeLine{00284\ \{}
\DoxyCodeLine{00285\ \ \ MODIFY\_REG(CRS-\/>CR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga755d695431db14c1b3b15a48ede61c13}{CRS\_CR\_TRIM}},\ Value\ <<\ CRS\_CR\_TRIM\_Pos);}
\DoxyCodeLine{00286\ \}}
\DoxyCodeLine{00287\ }
\DoxyCodeLine{00293\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_CRS\_GetHSI48SmoothTrimming(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00294\ \{}
\DoxyCodeLine{00295\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(CRS-\/>CR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga755d695431db14c1b3b15a48ede61c13}{CRS\_CR\_TRIM}})\ >>\ CRS\_CR\_TRIM\_Pos);}
\DoxyCodeLine{00296\ \}}
\DoxyCodeLine{00297\ }
\DoxyCodeLine{00306\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_CRS\_SetReloadCounter(uint32\_t\ Value)}
\DoxyCodeLine{00307\ \{}
\DoxyCodeLine{00308\ \ \ MODIFY\_REG(CRS-\/>CFGR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga7e54b011ada0eeb4b6ed9cdd24d517f9}{CRS\_CFGR\_RELOAD}},\ Value);}
\DoxyCodeLine{00309\ \}}
\DoxyCodeLine{00310\ }
\DoxyCodeLine{00316\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_CRS\_GetReloadCounter(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00317\ \{}
\DoxyCodeLine{00318\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(CRS-\/>CFGR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga7e54b011ada0eeb4b6ed9cdd24d517f9}{CRS\_CFGR\_RELOAD}}));}
\DoxyCodeLine{00319\ \}}
\DoxyCodeLine{00320\ }
\DoxyCodeLine{00328\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_CRS\_SetFreqErrorLimit(uint32\_t\ Value)}
\DoxyCodeLine{00329\ \{}
\DoxyCodeLine{00330\ \ \ MODIFY\_REG(CRS-\/>CFGR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga48c70ae21b6a35ed520a2b30df2c4852}{CRS\_CFGR\_FELIM}},\ Value\ <<\ CRS\_CFGR\_FELIM\_Pos);}
\DoxyCodeLine{00331\ \}}
\DoxyCodeLine{00332\ }
\DoxyCodeLine{00338\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_CRS\_GetFreqErrorLimit(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00339\ \{}
\DoxyCodeLine{00340\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(CRS-\/>CFGR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga48c70ae21b6a35ed520a2b30df2c4852}{CRS\_CFGR\_FELIM}})\ >>\ CRS\_CFGR\_FELIM\_Pos);}
\DoxyCodeLine{00341\ \}}
\DoxyCodeLine{00342\ }
\DoxyCodeLine{00357\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_CRS\_SetSyncDivider(uint32\_t\ Divider)}
\DoxyCodeLine{00358\ \{}
\DoxyCodeLine{00359\ \ \ MODIFY\_REG(CRS-\/>CFGR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gad0b3ee2ab042802997e57d788c640647}{CRS\_CFGR\_SYNCDIV}},\ Divider);}
\DoxyCodeLine{00360\ \}}
\DoxyCodeLine{00361\ }
\DoxyCodeLine{00375\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_CRS\_GetSyncDivider(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00376\ \{}
\DoxyCodeLine{00377\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(CRS-\/>CFGR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gad0b3ee2ab042802997e57d788c640647}{CRS\_CFGR\_SYNCDIV}}));}
\DoxyCodeLine{00378\ \}}
\DoxyCodeLine{00379\ }
\DoxyCodeLine{00389\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_CRS\_SetSyncSignalSource(uint32\_t\ Source)}
\DoxyCodeLine{00390\ \{}
\DoxyCodeLine{00391\ \ \ MODIFY\_REG(CRS-\/>CFGR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga441881d5e657b04236e440918fe63d20}{CRS\_CFGR\_SYNCSRC}},\ Source);}
\DoxyCodeLine{00392\ \}}
\DoxyCodeLine{00393\ }
\DoxyCodeLine{00402\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_CRS\_GetSyncSignalSource(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00403\ \{}
\DoxyCodeLine{00404\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(CRS-\/>CFGR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga441881d5e657b04236e440918fe63d20}{CRS\_CFGR\_SYNCSRC}}));}
\DoxyCodeLine{00405\ \}}
\DoxyCodeLine{00406\ }
\DoxyCodeLine{00415\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_CRS\_SetSyncPolarity(uint32\_t\ Polarity)}
\DoxyCodeLine{00416\ \{}
\DoxyCodeLine{00417\ \ \ MODIFY\_REG(CRS-\/>CFGR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gab28395cefb0927f2118a9a840a2e2d71}{CRS\_CFGR\_SYNCPOL}},\ Polarity);}
\DoxyCodeLine{00418\ \}}
\DoxyCodeLine{00419\ }
\DoxyCodeLine{00427\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_CRS\_GetSyncPolarity(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00428\ \{}
\DoxyCodeLine{00429\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(CRS-\/>CFGR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gab28395cefb0927f2118a9a840a2e2d71}{CRS\_CFGR\_SYNCPOL}}));}
\DoxyCodeLine{00430\ \}}
\DoxyCodeLine{00431\ }
\DoxyCodeLine{00450\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_CRS\_ConfigSynchronization(uint32\_t\ HSI48CalibrationValue,\ uint32\_t\ ErrorLimitValue,\ uint32\_t\ ReloadValue,\ uint32\_t\ Settings)}
\DoxyCodeLine{00451\ \{}
\DoxyCodeLine{00452\ \ \ MODIFY\_REG(CRS-\/>CR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga755d695431db14c1b3b15a48ede61c13}{CRS\_CR\_TRIM}},\ HSI48CalibrationValue);}
\DoxyCodeLine{00453\ \ \ MODIFY\_REG(CRS-\/>CFGR,}
\DoxyCodeLine{00454\ \ \ \ \ \ \ \ \ \ \ \ \ \ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga7e54b011ada0eeb4b6ed9cdd24d517f9}{CRS\_CFGR\_RELOAD}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga48c70ae21b6a35ed520a2b30df2c4852}{CRS\_CFGR\_FELIM}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gad0b3ee2ab042802997e57d788c640647}{CRS\_CFGR\_SYNCDIV}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga441881d5e657b04236e440918fe63d20}{CRS\_CFGR\_SYNCSRC}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gab28395cefb0927f2118a9a840a2e2d71}{CRS\_CFGR\_SYNCPOL}},}
\DoxyCodeLine{00455\ \ \ \ \ \ \ \ \ \ \ \ \ \ ReloadValue\ |\ (ErrorLimitValue\ <<\ CRS\_CFGR\_FELIM\_Pos)\ |\ Settings);}
\DoxyCodeLine{00456\ \}}
\DoxyCodeLine{00457\ }
\DoxyCodeLine{00461\ }
\DoxyCodeLine{00465\ }
\DoxyCodeLine{00471\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_CRS\_GenerateEvent\_SWSYNC(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00472\ \{}
\DoxyCodeLine{00473\ \ \ SET\_BIT(CRS-\/>CR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga53d79706214ba4ee9310e4b678d67e44}{CRS\_CR\_SWSYNC}});}
\DoxyCodeLine{00474\ \}}
\DoxyCodeLine{00475\ }
\DoxyCodeLine{00484\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_CRS\_GetFreqErrorDirection(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00485\ \{}
\DoxyCodeLine{00486\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(CRS-\/>ISR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga91196b059d8ff52c4f28bc964c8a446a}{CRS\_ISR\_FEDIR}}));}
\DoxyCodeLine{00487\ \}}
\DoxyCodeLine{00488\ }
\DoxyCodeLine{00494\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_CRS\_GetFreqErrorCapture(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00495\ \{}
\DoxyCodeLine{00496\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(CRS-\/>ISR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaf0b8a9757678f28814b1a0c1baca63e2}{CRS\_ISR\_FECAP}})\ >>\ CRS\_ISR\_FECAP\_Pos);}
\DoxyCodeLine{00497\ \}}
\DoxyCodeLine{00498\ }
\DoxyCodeLine{00502\ }
\DoxyCodeLine{00506\ }
\DoxyCodeLine{00512\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_CRS\_IsActiveFlag\_SYNCOK(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00513\ \{}
\DoxyCodeLine{00514\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(CRS-\/>ISR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gae0a9b5f8992ead0ad76fbb08a5e32419}{CRS\_ISR\_SYNCOKF}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gae0a9b5f8992ead0ad76fbb08a5e32419}{CRS\_ISR\_SYNCOKF}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00515\ \}}
\DoxyCodeLine{00516\ }
\DoxyCodeLine{00522\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_CRS\_IsActiveFlag\_SYNCWARN(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00523\ \{}
\DoxyCodeLine{00524\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(CRS-\/>ISR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga0f33a79fec47400ab363bbf5b4b9f2b5}{CRS\_ISR\_SYNCWARNF}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga0f33a79fec47400ab363bbf5b4b9f2b5}{CRS\_ISR\_SYNCWARNF}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00525\ \}}
\DoxyCodeLine{00526\ }
\DoxyCodeLine{00532\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_CRS\_IsActiveFlag\_ERR(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00533\ \{}
\DoxyCodeLine{00534\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(CRS-\/>ISR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga963b451a4ca8890ee3d323304f0b9298}{CRS\_ISR\_ERRF}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga963b451a4ca8890ee3d323304f0b9298}{CRS\_ISR\_ERRF}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00535\ \}}
\DoxyCodeLine{00536\ }
\DoxyCodeLine{00542\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_CRS\_IsActiveFlag\_ESYNC(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00543\ \{}
\DoxyCodeLine{00544\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(CRS-\/>ISR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga819c4d424be7915f9660ecb19c234a8f}{CRS\_ISR\_ESYNCF}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga819c4d424be7915f9660ecb19c234a8f}{CRS\_ISR\_ESYNCF}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00545\ \}}
\DoxyCodeLine{00546\ }
\DoxyCodeLine{00552\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_CRS\_IsActiveFlag\_SYNCERR(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00553\ \{}
\DoxyCodeLine{00554\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(CRS-\/>ISR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga80d05ae1142788a65444c0463a26bcfb}{CRS\_ISR\_SYNCERR}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga80d05ae1142788a65444c0463a26bcfb}{CRS\_ISR\_SYNCERR}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00555\ \}}
\DoxyCodeLine{00556\ }
\DoxyCodeLine{00562\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_CRS\_IsActiveFlag\_SYNCMISS(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00563\ \{}
\DoxyCodeLine{00564\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(CRS-\/>ISR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga9f2241bd51b436f7b381ad410124aec5}{CRS\_ISR\_SYNCMISS}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga9f2241bd51b436f7b381ad410124aec5}{CRS\_ISR\_SYNCMISS}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00565\ \}}
\DoxyCodeLine{00566\ }
\DoxyCodeLine{00572\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_CRS\_IsActiveFlag\_TRIMOVF(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00573\ \{}
\DoxyCodeLine{00574\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(CRS-\/>ISR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaf3852f10eb46159b7888c71e6d9cec3b}{CRS\_ISR\_TRIMOVF}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaf3852f10eb46159b7888c71e6d9cec3b}{CRS\_ISR\_TRIMOVF}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00575\ \}}
\DoxyCodeLine{00576\ }
\DoxyCodeLine{00582\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_CRS\_ClearFlag\_SYNCOK(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00583\ \{}
\DoxyCodeLine{00584\ \ \ WRITE\_REG(CRS-\/>ICR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaa42110e626aeef3ca9d76c8bda1f08d6}{CRS\_ICR\_SYNCOKC}});}
\DoxyCodeLine{00585\ \}}
\DoxyCodeLine{00586\ }
\DoxyCodeLine{00592\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_CRS\_ClearFlag\_SYNCWARN(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00593\ \{}
\DoxyCodeLine{00594\ \ \ WRITE\_REG(CRS-\/>ICR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gab772d21f8bc42ad5761a270d663be1ce}{CRS\_ICR\_SYNCWARNC}});}
\DoxyCodeLine{00595\ \}}
\DoxyCodeLine{00596\ }
\DoxyCodeLine{00603\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_CRS\_ClearFlag\_ERR(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00604\ \{}
\DoxyCodeLine{00605\ \ \ WRITE\_REG(CRS-\/>ICR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gae67dc4a9e576468b0c322902c7c47793}{CRS\_ICR\_ERRC}});}
\DoxyCodeLine{00606\ \}}
\DoxyCodeLine{00607\ }
\DoxyCodeLine{00613\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_CRS\_ClearFlag\_ESYNC(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00614\ \{}
\DoxyCodeLine{00615\ \ \ WRITE\_REG(CRS-\/>ICR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gacfaa0b3004143ca5b1a7fe5ed23daccf}{CRS\_ICR\_ESYNCC}});}
\DoxyCodeLine{00616\ \}}
\DoxyCodeLine{00617\ }
\DoxyCodeLine{00621\ }
\DoxyCodeLine{00625\ }
\DoxyCodeLine{00631\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_CRS\_EnableIT\_SYNCOK(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00632\ \{}
\DoxyCodeLine{00633\ \ \ SET\_BIT(CRS-\/>CR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga246a4b3d840b5b9a18f6ea414fc48297}{CRS\_CR\_SYNCOKIE}});}
\DoxyCodeLine{00634\ \}}
\DoxyCodeLine{00635\ }
\DoxyCodeLine{00641\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_CRS\_DisableIT\_SYNCOK(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00642\ \{}
\DoxyCodeLine{00643\ \ \ CLEAR\_BIT(CRS-\/>CR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga246a4b3d840b5b9a18f6ea414fc48297}{CRS\_CR\_SYNCOKIE}});}
\DoxyCodeLine{00644\ \}}
\DoxyCodeLine{00645\ }
\DoxyCodeLine{00651\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_CRS\_IsEnabledIT\_SYNCOK(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00652\ \{}
\DoxyCodeLine{00653\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(CRS-\/>CR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga246a4b3d840b5b9a18f6ea414fc48297}{CRS\_CR\_SYNCOKIE}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga246a4b3d840b5b9a18f6ea414fc48297}{CRS\_CR\_SYNCOKIE}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00654\ \}}
\DoxyCodeLine{00655\ }
\DoxyCodeLine{00661\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_CRS\_EnableIT\_SYNCWARN(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00662\ \{}
\DoxyCodeLine{00663\ \ \ SET\_BIT(CRS-\/>CR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gac27fb8e1741d3b5c19a527955eb00bad}{CRS\_CR\_SYNCWARNIE}});}
\DoxyCodeLine{00664\ \}}
\DoxyCodeLine{00665\ }
\DoxyCodeLine{00671\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_CRS\_DisableIT\_SYNCWARN(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00672\ \{}
\DoxyCodeLine{00673\ \ \ CLEAR\_BIT(CRS-\/>CR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gac27fb8e1741d3b5c19a527955eb00bad}{CRS\_CR\_SYNCWARNIE}});}
\DoxyCodeLine{00674\ \}}
\DoxyCodeLine{00675\ }
\DoxyCodeLine{00681\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_CRS\_IsEnabledIT\_SYNCWARN(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00682\ \{}
\DoxyCodeLine{00683\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(CRS-\/>CR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gac27fb8e1741d3b5c19a527955eb00bad}{CRS\_CR\_SYNCWARNIE}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gac27fb8e1741d3b5c19a527955eb00bad}{CRS\_CR\_SYNCWARNIE}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00684\ \}}
\DoxyCodeLine{00685\ }
\DoxyCodeLine{00691\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_CRS\_EnableIT\_ERR(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00692\ \{}
\DoxyCodeLine{00693\ \ \ SET\_BIT(CRS-\/>CR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gac616bbfe903ec7cc2be289db5fba0fe5}{CRS\_CR\_ERRIE}});}
\DoxyCodeLine{00694\ \}}
\DoxyCodeLine{00695\ }
\DoxyCodeLine{00701\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_CRS\_DisableIT\_ERR(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00702\ \{}
\DoxyCodeLine{00703\ \ \ CLEAR\_BIT(CRS-\/>CR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gac616bbfe903ec7cc2be289db5fba0fe5}{CRS\_CR\_ERRIE}});}
\DoxyCodeLine{00704\ \}}
\DoxyCodeLine{00705\ }
\DoxyCodeLine{00711\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_CRS\_IsEnabledIT\_ERR(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00712\ \{}
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\DoxyCodeLine{00714\ \}}
\DoxyCodeLine{00715\ }
\DoxyCodeLine{00721\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_CRS\_EnableIT\_ESYNC(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00722\ \{}
\DoxyCodeLine{00723\ \ \ SET\_BIT(CRS-\/>CR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga3831818c762e279f698faf27f4e7db4a}{CRS\_CR\_ESYNCIE}});}
\DoxyCodeLine{00724\ \}}
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\DoxyCodeLine{00731\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_CRS\_DisableIT\_ESYNC(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00732\ \{}
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\DoxyCodeLine{00734\ \}}
\DoxyCodeLine{00735\ }
\DoxyCodeLine{00741\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_CRS\_IsEnabledIT\_ESYNC(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00742\ \{}
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\DoxyCodeLine{00744\ \}}
\DoxyCodeLine{00745\ }
\DoxyCodeLine{00749\ }
\DoxyCodeLine{00750\ \textcolor{preprocessor}{\#if\ defined(USE\_FULL\_LL\_DRIVER)}\textcolor{preprocessor}{}}
\DoxyCodeLine{00754\ }
\DoxyCodeLine{00755\ ErrorStatus\ LL\_CRS\_DeInit(\textcolor{keywordtype}{void});}
\DoxyCodeLine{00756\ }
\DoxyCodeLine{00760\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ USE\_FULL\_LL\_DRIVER\ */}\textcolor{preprocessor}{}}
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\DoxyCodeLine{00765\ }
\DoxyCodeLine{00769\ }
\DoxyCodeLine{00770\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ defined(CRS)\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00771\ }
\DoxyCodeLine{00775\ }
\DoxyCodeLine{00776\ \textcolor{preprocessor}{\#ifdef\ \_\_cplusplus}}
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\DoxyCodeLine{00778\ \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{00779\ }
\DoxyCodeLine{00780\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ STM32H7xx\_LL\_CRS\_H\ */}\textcolor{preprocessor}{}}

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